In most digital systems, failures arise which require a timing examination of certain signals. In many cases, these failures are caused by spurious transitions or "glitches" on a digital signal. This invention allows detection of these glitches without altering the apparent timing characteristics of the signal or signals under test.
One previous method of glitch detection relies on a technique referred to as pulse-stretching. This technique is very simple to implement and is very useful in some applications. However, it lacks in two areas which may mislead the user and cause erroneous conclusions. First, the technique does not detect some types of glitches. Secondly, the technique does not distinguish glitches from the sampled data. To understand the reasons for this, consider the method in which the pulse-stretcher operates.
Without a pulse-stretcher, the system making the measurement samples the signal at each sampler clock edge as shown in FIG. 1. Since the glitch on the signal under test occurred between clock edges, the glitch was not sampled. With a pulse-stretcher, the glitch is "stretched" sufficiently to allow the next available clock (at T.sub.1) to sample the stretched glitch.
To understand why the pulse-stretcher fails to detect some glitches, refer to FIG. 2. The pulse-stretcher recognizes the negative transition at time T.sub.1 on the signal under test and "stretches" the low level until the sampler clock occurs at T.sub.2. Any activity on the signal that occurs between T.sub.1 and T.sub.2 is ignored. Therefore, the glitch on the signal under test is not detected.
Since the pulse-stretcher modifies the signal under test to allow glitches to be sampled, there is no way of separating the glitch information from the signal information that was actually present at the sampler clock time. When many channels of information are being viewed simultaneously, it is often difficult to distinguish the glitches from the ordinary data pattern.
The Hewlett-Packard 5000A Logic Analyzer uses a second method of glitch detection. It uses what is termed a spike detector and defines a spike as two or more transitions within a clock period. This method allows the glitch indicated in FIG. 2 to be detected. Note that the period between consecutive clock pulses at T.sub.0 and T.sub.2 contains three transitions, thereby indicating that a glitch occurred. The spike detector also allows the glitch information to be distinguished from the sampled data since the glitch information can be stored in a different memory. However, because of the type display used in the 5000A, both glitch information and sampled data may not be displayed simultaneously. The spike detector also fails to detect a certain type of glitch. Referring to FIG. 3, a transition on the signal under test occurs just prior to the sample clock edge (T.sub.2). The latch that samples the signal under test does not necessarily latch the data that is present at the clock sampler edge. Because of the set-up and hold time of the latch, the data that is captured is likely the data that was present a few nanoseconds prior to the sampler clock edge (T.sub.1). Therefore, the sampler clock edge at T.sub.3 captures a low signal, as does the sample edge at T.sub.0 and T.sub.4. Note also that only one transition occurs in the time interval between T.sub.0 and T.sub.3, and only one transition occurs in the time interval between T.sub.3 and T.sub.4. Therefore, the glitch is neither sampled by the sampler clock nor detected by the spike detector.
It is therefore an object of the present invention to detect spurious transitions upon a sampled signal.
It is further object of the present invention to provide a simultaneous display of the sampled data and the glitch information.
It is a further object of the present invention to provide a trigger upon the detection of a glitch for retrieving selected segments of the sampled data and the glitch information.
These and other objects are accomplished in accordance with the present invention by a unique definition of a glitch, a method and circuitry for detecting the defined glitch condition without alteration of the signal under test, and a simultaneous display of the sampled data and glitch information.